I am struggling to solve the problems in this assignment would you be able to give some clue?

1st Semester 2016

ELECTRICAL CIRCUITS (ELEN2000)

ASSIGNMENT

Assignment to be handed to Assignment Office on level 2 of building 204 no later than 3pm Friday 27th May, 2016.

Introduction

This assignment focuses on the analysis and design of a system for playing back a digitallystored audio signal.

System Overview

A block diagram of the audio playback system is shown in Figure 1. At the center of the system is a digital memory in which 131,072 samples of the audio signal are stored. Each sample in the memory has a unique numerical address between 0 and 131,071, inclusive. Consecutive samples are stored at consecutive addresses.

Figure 1: Block diagram of the audio playback system

To obtain 131,072 consecutive samples of the audio signal, 16.384 seconds of continuous analog audio signal were first sampled at an 8-kHz rate. The analog audio samples were then digitized by an 8-bit analog-to-digital converter (circuit not shown here). That is, the samples were quantized to take on one of 256 possible discrete digital values between 0 and 255, inclusive. Here, the digital value of 0 corresponds to the most positive signal voltage, and the digital value of 255 corresponds to the most negative signal voltage. The resulting digital data is then written into the memory.

To retrieve the stored audio signal samples in sequence at the proper rate, the memory is addressed by a counter which counts from 0 to 131,071 at an 8-kHz rate established by an external clock. After counting to 131,071 the counter returns to 0, and the retrieval process repeats itself. As the memory address increments, the corresponding data appears at the memory output. This data is converted back to an analog voltage in a piecewise constant manner by a digital-to-analog converter.

During the course of recording and playing back the analog audio signal, the signal is sampled in time, quantized in amplitude, and reconstructed in a piecewise constant manner by the digital-to-analog converter. However, this process introduces undesirable highfrequency components into the reconstructed analog audio signal. To minimize the perceived impact of these components when played through a headphone, the signal is filtered by a lowpass filter after it is reconstructed by the digital-to-analog converter. Finally, the signal is fed into a volume control stage which in turn drives a headphone.

In the course of this assignment you will analyse and design four of the functional blocks shown in Figure 1. These blocks are the clock, the digital-to-analog converter, the low-pass filter and the volume control.

TASK 1 - The Clock

The circuit shown in Figure 2 is the system clock, which is a square-wave oscillator followed by a CMOS inverter; the inverter functions only as a buffer. The oscillator is constructed from another CMOS inverter, a resistor and a capacitor. Both inverters are powered between the positive supply voltage ???? and ground, and both exhibit the hysteretic input-output characteristic defined in Figure 3. The inverters are otherwise ideal (that is, they have infinite input resistance and the output is an ideal voltage source).

Figure 2: System clock design

(a) Assume that ???????? has just charged up to ???? so that ???????? has just switched to 0V. In terms of R, C, ????, and ????, determine how much time elapses before ???????? decays to ????, which in turn causes ???????? to switch to ????. [5 marks]

(b) Assume that ???????? has just decayed to ???? so that ???????? has just switched to ????. In terms of R, C, ????, and ????, and ????, determine how much time elapses before ???????? charges up to ????, which in turn causes ???????? to switch to 0V. [5 marks]

(c) Determine the frequency of the oscillator in terms of R, C, ????, and ????, and ????.

[3 marks]

(d) Assume that ???? =1.8V, ???? =3.0V and ???? =5.0V. Choose values for R and C so that the oscillator oscillates at or very near 8-kHz. Since oscillator frequency alone is not enough information to specify unique values for R and C, there is no single correct choice. Therefore, choose values for R and C that are easily implemented with

standard components. [3 marks]

(e) For the choice of R and C from Part(d), sketch and clearly label a single graph that displays ????????, ???????? and ???????? as a function of time over one period of oscillation.

[5 marks]

TASK 2 - Digital-To-Analog Converter

The circuit shown in Figure 4 is the digital-to-analog converter (DAC) design to be used in this system. The voltage sources ??????0 through ??????7 represent the voltages supplied by the eight data bits of the digital memory, DB0 through DB7. These voltages will be approximately 5V when the corresponding data bit is a logical high, and approximately 0V when the corresponding data bit is a logical low. The voltage ???????? , which is set by a potentiometer, is an offset voltage that is used to center the output of the converter around 0V. Assume that the op-amp used in the DAC is ideal.

(a) Using superposition, determine ???????? as a function of ??????0 through ??????7 and ????????.

[7 marks]

(b) With ???????? = 0V, the output of the digital-to-analog converter should span the range of 0V to -2.5V. Thus, the output of the converter should be given by

where each data bit DBi takes on the numerical value of 1 when high and 0 when low. In this manner, each successive data bit from DB0 to DB7 is given a voltage weighting twice that of the preceding data bit, making it possible for the converter to output

voltages from 0 V to -2.5 V in steps of -2.5/255 = -9.8mV. Given this required behaviour, determine ??2 in terms of ??1.

[7 marks]

The voltage rating of the headphone is approximately ±1.25 V. Since the low-pass filter and buffer between the DAC and the speaker both have unity voltage gain over the frequency range of interest, the output range of the DAC must be designed to match the headphone rating. This is why the range is chosen to be 0 V to -2.5 V, with ???????? =0. Note further that the output range of the DAC is negative. This is because the DAC used is based upon the inverting amplifier configuration.

(c) The role of ???????? is to offset the output of the DAC so that it is centered around 0V. That is, with DB0 through DB7 all low, ???????? should be 1.25V, and with DB0 through

DB7 all high, ???????? should be -1.25V. Given this, what must be the value of ?????????

[3 marks]

(d) Assume that ??1 =10kO. Use the result of Part(b) to determine ??2. [2 marks]

TASK 3 - The Low-Pass Filter

The circuit shown in Figure 5 is the low-pass filter. It is a second-order filter, and is driven by the output of the DAC. Its purpose is to remove the high-frequency components of the audio signal that result from the sampling, quantization and reconstruction of that signal. Assume that the op-amp used in the filter is ideal.

Figure 5: Low pass filter design

(a) Assume that the low-pass filter operates in sinusoidal steady state. Find the inputoutput transfer function ????????(????) = ????????(????)/????????(????) using Phasor circuit analysis techniques being sure to provide all analytical analysis details.

[3 marks]

(b) Using the results of Part(a), find the magnitude |????????(????)| and phase ?????????(????) of

????????(????) and draw the associated Bode plots. [3 marks]

(c) There is no best design for the low-pass filter to meet the needs of the audio playback system. However, with the appropriate choice of ??1, ??2 and R, the transfer function of one good design will take the form

where ???????? is a specified frequency that is a function of circuit component values. For this design, show that the low-frequency and high-frequency asymptotes of |????????(????)| intersect at ? = ????????, and therefore that ???????? is the frequency that delineates the pass

band of the low-pass amplifier. [3 marks]

(d) What constraints must be imposed on ??1, ??2 and R to obtain the low-pass filter transfer function described in Part(c)? [3 marks]

(e) The audio being played has frequency components between 200Hz and 4kHz and it is necessary to not excessively attenuate content within that frequency range. Given that the low-pass filter is to be designed as described in Part(c), use the equation in Part (c)

and the results of Part(d) to choose values for ??1, ??2 and R so |????????(????)| 0.95 for

2p × 200 rad/sec ? = 2p × 4000 rad/sec (use analytical techniques to do this NOT simulation). Since the results of Part(d) are not enough information to specify unique values for ??1, ??2 and R, there is no single correct choice. Therefore, choose ??1, ??2 and R so that they are easily implemented with standard components.

[7 marks]

(f) Given the choice of ??1, ??2 and R from Part (e), determine ???????? and using PSPICE plot both the log-magnitude |????????(????)| and phase ?????????(????) of ????????(????) against

1 5 log-frequency for 2p × 10 rad/s = ? = 2p × 10 rad/s to confirm the correctness of your final low pass filter design.

[7 marks]

TASK 4 - The Volume Control

Figure 6 shows the output of the low-pass filter driving the volume control stage, which in turn drives the headphone. A potentiometer is used for ????2 so that the gain of the circuit (and therefore the volume at the headphone) can be easily adjusted from zero to unity. Assume that the op-amp in the design is ideal.

Because there exists a coupling capacitor at its input, the volume control stage behaves like a high-pass filter. In this way, the volume control stage is designed to prevent a possibly damaging DC voltage from being applied to the headphone. Such a voltage component could be present in ???????? if, for example, ???????? in the DAC is not properly adjusted to balance the output of the converter.

(a) Assume that the volume control stage operates in sinusoidal steady state. Find the input-output transfer function ????????(????) = ????????(????)/????????(????) using Phasor circuit analysis techniques being sure to provide all analytical analysis details then find the magnitude |????????(????)| and phase ?????????(????) of ????????(????) and draw the associated Bode plots.

[7 marks] (b) Let ???????? be the frequency at which the low-frequency and high-frequency asymptotes of |????????(????)| intersect. Determine ???????? in terms of ??1, ????2 and C.

[3 marks]

(c) The audio being played has frequency components between 200Hz and 4kHz. Using the results of Part(a), choose values for ??1, ????2 and C so that ???????? is as large as possible and with ????2 set for unity gain operation that |????????(????)| 0.95 for 2p × 200 rad/sec ? = 2p × 4000 rad/sec (use analytical techniques to do this NOT simulation). Since these conditions alone are not enough to specify unique values for ??1, ????2 and C, there is no single correct choice. Therefore, choose values for ??1, ????2 and C that are easily implemented with standard components.

[7 marks] (d) Using the results of Part(c), determine ????????and using PSPICE plot both the logmagnitude |????????(????)| and phase ?????????(????) of ????????(????) against log-frequency for

1 5

2p × 10 rad/s = ? = 2p × 10 rad/s to confirm the correctness of your final volume control circuit design.

[7 marks]

TASK 5 – Connecting the stages

In the complete audio playback system the output of the DAC is connected directly to the input of the low-pass filter, and the output of the low-pass filter is connected directly to the input of the volume control stage, as shown in Figure 1. Thus, the filter loads the converter, and the amplifier loads the filter. Explain why this loading could be ignored in Tasks 2, 3 and 4. That is, explain why the converter, filter and volume control stage may each be analysed and designed in isolation.

[10 marks]

END OF ASSIGNMENT

1st Semester 2016

ELECTRICAL CIRCUITS (ELEN2000)

ASSIGNMENT

Assignment to be handed to Assignment Office on level 2 of building 204 no later than 3pm Friday 27th May, 2016.

Introduction

This assignment focuses on the analysis and design of a system for playing back a digitallystored audio signal.

System Overview

A block diagram of the audio playback system is shown in Figure 1. At the center of the system is a digital memory in which 131,072 samples of the audio signal are stored. Each sample in the memory has a unique numerical address between 0 and 131,071, inclusive. Consecutive samples are stored at consecutive addresses.

Figure 1: Block diagram of the audio playback system

To obtain 131,072 consecutive samples of the audio signal, 16.384 seconds of continuous analog audio signal were first sampled at an 8-kHz rate. The analog audio samples were then digitized by an 8-bit analog-to-digital converter (circuit not shown here). That is, the samples were quantized to take on one of 256 possible discrete digital values between 0 and 255, inclusive. Here, the digital value of 0 corresponds to the most positive signal voltage, and the digital value of 255 corresponds to the most negative signal voltage. The resulting digital data is then written into the memory.

To retrieve the stored audio signal samples in sequence at the proper rate, the memory is addressed by a counter which counts from 0 to 131,071 at an 8-kHz rate established by an external clock. After counting to 131,071 the counter returns to 0, and the retrieval process repeats itself. As the memory address increments, the corresponding data appears at the memory output. This data is converted back to an analog voltage in a piecewise constant manner by a digital-to-analog converter.

During the course of recording and playing back the analog audio signal, the signal is sampled in time, quantized in amplitude, and reconstructed in a piecewise constant manner by the digital-to-analog converter. However, this process introduces undesirable highfrequency components into the reconstructed analog audio signal. To minimize the perceived impact of these components when played through a headphone, the signal is filtered by a lowpass filter after it is reconstructed by the digital-to-analog converter. Finally, the signal is fed into a volume control stage which in turn drives a headphone.

In the course of this assignment you will analyse and design four of the functional blocks shown in Figure 1. These blocks are the clock, the digital-to-analog converter, the low-pass filter and the volume control.

TASK 1 - The Clock

The circuit shown in Figure 2 is the system clock, which is a square-wave oscillator followed by a CMOS inverter; the inverter functions only as a buffer. The oscillator is constructed from another CMOS inverter, a resistor and a capacitor. Both inverters are powered between the positive supply voltage ???? and ground, and both exhibit the hysteretic input-output characteristic defined in Figure 3. The inverters are otherwise ideal (that is, they have infinite input resistance and the output is an ideal voltage source).

Figure 2: System clock design

(a) Assume that ???????? has just charged up to ???? so that ???????? has just switched to 0V. In terms of R, C, ????, and ????, determine how much time elapses before ???????? decays to ????, which in turn causes ???????? to switch to ????. [5 marks]

(b) Assume that ???????? has just decayed to ???? so that ???????? has just switched to ????. In terms of R, C, ????, and ????, and ????, determine how much time elapses before ???????? charges up to ????, which in turn causes ???????? to switch to 0V. [5 marks]

(c) Determine the frequency of the oscillator in terms of R, C, ????, and ????, and ????.

[3 marks]

(d) Assume that ???? =1.8V, ???? =3.0V and ???? =5.0V. Choose values for R and C so that the oscillator oscillates at or very near 8-kHz. Since oscillator frequency alone is not enough information to specify unique values for R and C, there is no single correct choice. Therefore, choose values for R and C that are easily implemented with

standard components. [3 marks]

(e) For the choice of R and C from Part(d), sketch and clearly label a single graph that displays ????????, ???????? and ???????? as a function of time over one period of oscillation.

[5 marks]

TASK 2 - Digital-To-Analog Converter

The circuit shown in Figure 4 is the digital-to-analog converter (DAC) design to be used in this system. The voltage sources ??????0 through ??????7 represent the voltages supplied by the eight data bits of the digital memory, DB0 through DB7. These voltages will be approximately 5V when the corresponding data bit is a logical high, and approximately 0V when the corresponding data bit is a logical low. The voltage ???????? , which is set by a potentiometer, is an offset voltage that is used to center the output of the converter around 0V. Assume that the op-amp used in the DAC is ideal.

(a) Using superposition, determine ???????? as a function of ??????0 through ??????7 and ????????.

[7 marks]

(b) With ???????? = 0V, the output of the digital-to-analog converter should span the range of 0V to -2.5V. Thus, the output of the converter should be given by

where each data bit DBi takes on the numerical value of 1 when high and 0 when low. In this manner, each successive data bit from DB0 to DB7 is given a voltage weighting twice that of the preceding data bit, making it possible for the converter to output

voltages from 0 V to -2.5 V in steps of -2.5/255 = -9.8mV. Given this required behaviour, determine ??2 in terms of ??1.

[7 marks]

The voltage rating of the headphone is approximately ±1.25 V. Since the low-pass filter and buffer between the DAC and the speaker both have unity voltage gain over the frequency range of interest, the output range of the DAC must be designed to match the headphone rating. This is why the range is chosen to be 0 V to -2.5 V, with ???????? =0. Note further that the output range of the DAC is negative. This is because the DAC used is based upon the inverting amplifier configuration.

(c) The role of ???????? is to offset the output of the DAC so that it is centered around 0V. That is, with DB0 through DB7 all low, ???????? should be 1.25V, and with DB0 through

DB7 all high, ???????? should be -1.25V. Given this, what must be the value of ?????????

[3 marks]

(d) Assume that ??1 =10kO. Use the result of Part(b) to determine ??2. [2 marks]

TASK 3 - The Low-Pass Filter

The circuit shown in Figure 5 is the low-pass filter. It is a second-order filter, and is driven by the output of the DAC. Its purpose is to remove the high-frequency components of the audio signal that result from the sampling, quantization and reconstruction of that signal. Assume that the op-amp used in the filter is ideal.

Figure 5: Low pass filter design

(a) Assume that the low-pass filter operates in sinusoidal steady state. Find the inputoutput transfer function ????????(????) = ????????(????)/????????(????) using Phasor circuit analysis techniques being sure to provide all analytical analysis details.

[3 marks]

(b) Using the results of Part(a), find the magnitude |????????(????)| and phase ?????????(????) of

????????(????) and draw the associated Bode plots. [3 marks]

(c) There is no best design for the low-pass filter to meet the needs of the audio playback system. However, with the appropriate choice of ??1, ??2 and R, the transfer function of one good design will take the form

where ???????? is a specified frequency that is a function of circuit component values. For this design, show that the low-frequency and high-frequency asymptotes of |????????(????)| intersect at ? = ????????, and therefore that ???????? is the frequency that delineates the pass

band of the low-pass amplifier. [3 marks]

(d) What constraints must be imposed on ??1, ??2 and R to obtain the low-pass filter transfer function described in Part(c)? [3 marks]

(e) The audio being played has frequency components between 200Hz and 4kHz and it is necessary to not excessively attenuate content within that frequency range. Given that the low-pass filter is to be designed as described in Part(c), use the equation in Part (c)

and the results of Part(d) to choose values for ??1, ??2 and R so |????????(????)| 0.95 for

2p × 200 rad/sec ? = 2p × 4000 rad/sec (use analytical techniques to do this NOT simulation). Since the results of Part(d) are not enough information to specify unique values for ??1, ??2 and R, there is no single correct choice. Therefore, choose ??1, ??2 and R so that they are easily implemented with standard components.

[7 marks]

(f) Given the choice of ??1, ??2 and R from Part (e), determine ???????? and using PSPICE plot both the log-magnitude |????????(????)| and phase ?????????(????) of ????????(????) against

1 5 log-frequency for 2p × 10 rad/s = ? = 2p × 10 rad/s to confirm the correctness of your final low pass filter design.

[7 marks]

TASK 4 - The Volume Control

Figure 6 shows the output of the low-pass filter driving the volume control stage, which in turn drives the headphone. A potentiometer is used for ????2 so that the gain of the circuit (and therefore the volume at the headphone) can be easily adjusted from zero to unity. Assume that the op-amp in the design is ideal.

Because there exists a coupling capacitor at its input, the volume control stage behaves like a high-pass filter. In this way, the volume control stage is designed to prevent a possibly damaging DC voltage from being applied to the headphone. Such a voltage component could be present in ???????? if, for example, ???????? in the DAC is not properly adjusted to balance the output of the converter.

(a) Assume that the volume control stage operates in sinusoidal steady state. Find the input-output transfer function ????????(????) = ????????(????)/????????(????) using Phasor circuit analysis techniques being sure to provide all analytical analysis details then find the magnitude |????????(????)| and phase ?????????(????) of ????????(????) and draw the associated Bode plots.

[7 marks] (b) Let ???????? be the frequency at which the low-frequency and high-frequency asymptotes of |????????(????)| intersect. Determine ???????? in terms of ??1, ????2 and C.

[3 marks]

(c) The audio being played has frequency components between 200Hz and 4kHz. Using the results of Part(a), choose values for ??1, ????2 and C so that ???????? is as large as possible and with ????2 set for unity gain operation that |????????(????)| 0.95 for 2p × 200 rad/sec ? = 2p × 4000 rad/sec (use analytical techniques to do this NOT simulation). Since these conditions alone are not enough to specify unique values for ??1, ????2 and C, there is no single correct choice. Therefore, choose values for ??1, ????2 and C that are easily implemented with standard components.

[7 marks] (d) Using the results of Part(c), determine ????????and using PSPICE plot both the logmagnitude |????????(????)| and phase ?????????(????) of ????????(????) against log-frequency for

1 5

2p × 10 rad/s = ? = 2p × 10 rad/s to confirm the correctness of your final volume control circuit design.

[7 marks]

TASK 5 – Connecting the stages

In the complete audio playback system the output of the DAC is connected directly to the input of the low-pass filter, and the output of the low-pass filter is connected directly to the input of the volume control stage, as shown in Figure 1. Thus, the filter loads the converter, and the amplifier loads the filter. Explain why this loading could be ignored in Tasks 2, 3 and 4. That is, explain why the converter, filter and volume control stage may each be analysed and designed in isolation.

[10 marks]

END OF ASSIGNMENT

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